Disable Hardware Prefetching in Intel Microprocessors

Prefetchers are built to predict the data that is going to be accessed by a program and automatically load the data into the cache memory, before the program actually requires it. Sometimes predictions can be woefully wrong, and affect the program's performance. So programmers need to test their programs with prefetching disabled.

There are two ways that prefetching can be disabled:

1. From the BIOS: On certain systems (mostly servers) the BIOS allows prefetching to be disabled. This is the easiest way to get the deed done.

2. Using MSR Registers: Model specific registers in Intel processors allow vital micro-architecture configurations in the processor to be viewed and modified.
I have a previous blog which shows how MSR registers can be accessed in a previous post (http://arbidprobramming.blogspot.in/2010/04/programming-intels-model-specific.html).

On an Intel i3, MSR 0x1a0 has 4 bits that deal with prefetching:

• Bit 9: Hardware Prefetcher Disable
• Bit 19: Adjacent Cache Line Prefetch Disable
• Bit 37: DCU Prefetcher Disable
• Bit 39: IP Prefetcher Disable

On AMD Family 10h processors, MSR 0xC0011022 bit 13 needs to be set to disable prefetching

 Setting any of these bits to 1 will disable that prefetcher.

However, from Nehalem onwards, Intel has disabled the option of controlling  prefetching from the MSRs, the BIOS seems to be the only way then. I'm not sure how prefetching can be disabled if the BIOS does not provide an option :(